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Decoder is a circuit which have n inputs and 2^n outputs.I think you want to say encoder which have 2^n input and n output lines. So your required chip is 8(2^3)X3 encoder which does not exist.

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N-2n decoder input and output lines?

An N-2N decoder is a digital circuit that converts N input lines into 2^N output lines. For each unique combination of the input lines, one specific output line is activated while all others remain inactive. For instance, if there are 3 input lines (N=3), the decoder will produce 2^3 = 8 output lines, allowing it to represent all combinations of the 3 inputs. This type of decoder is commonly used in memory address decoding and data routing applications.


How many 3-to-8 line decoders with an enable input are needed to construct a 6-64?

You need 9 3-to-8 decoders. 8 decoders for selecting one of 64 lines. 1 decoder for enabling 1 decoder out of 8 decoder.


Explain Implementation of full adder with a decoder?

A full adder can be implemented using a decoder by utilizing a 3-to-8 line decoder to decode the three input bits: A, B, and Carry-in (Cin). The decoder generates eight output lines corresponding to all possible combinations of the three inputs. The outputs of the decoder can then be combined with logic gates to derive the Sum and Carry-out outputs of the full adder. Specifically, the Sum output can be generated by ORing the appropriate outputs of the decoder, and the Carry-out can be derived from a combination of specific outputs as well.


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How do you make 3 8 decoder?

Use two 2-4 decoders.


How does a memory decoder 74Ls138 function?

The 74LS138 is a 3-to-8 line decoder that takes 3 input binary signals and activates one of eight output lines based on those inputs. It features three select inputs (A0, A1, A2) that determine which output (Y0 to Y7) will be low (active), while all other outputs remain high (inactive). The decoder also has enable inputs to control its operation; if the enables are not activated, none of the outputs will be activated. This device is commonly used in memory address decoding and data routing applications.


What is the 3 MT cross lines on the IC chip of memory module?

Some really quality blog posts on this internet site , saved to fav. gdedcecfbddcdeed


Why does your LCD not isplay the full picture from your decoder It is zoomed by default and I cant reset it?

Oh I had to change the settings on the decoder to send the signal as 4:3 instead of 16:9


How tall is Chip Lohmiller?

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Explain 3 line to 8 line decoder?

chuma da do chuma da do!


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I wanted the theory for implementation of full adder using 3 to 8 decoder and 4 input nand gates?

A full adder is a logic circuit that take two inputs and a carry input, and produces an output and a carry ouput. It is one stage in a multi-bit adder. The truth table is: ABC RC D000 00 0001 10 1010 10 2011 01 3100 10 4101 01 5110 01 6111 11 7The columns are A, B, Carry Input, Result, Carry Output, and Decoder Output You can use a 3 to 8 decoder to generate these 8 lines. Look at the R and C outputs, and note that there are 4 combinations of inputs thet generate a 1 or a 0. For each of Result and Carry Ouput, connect the decoder output representing the 0 state to those four lines. (Result = 0, 3, 5, 6. Carry Output = 0, 1, 2, 4) What you are doing logically is or'ing the lines to produce the 1's. Since you have nands instead or ors, treat the nands as nors and pick the opposite inputs.