What is the VHDL programme for 8 to 3 priority encoder using data flow style?

Answer 1

A VHDL program for an 8-to-3 priority encoder using data flow style can be implemented using the when-else construct. The encoder outputs a 3-bit binary representation of the highest-priority active input (from 7 to 0), while also providing an output for invalid conditions. Here’s a simple example:

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity priority_encoder is
    Port ( input : in STD_LOGIC_VECTOR(7 downto 0);
           output : out STD_LOGIC_VECTOR(2 downto 0);
           valid : out STD_LOGIC);
end priority_encoder;

architecture dataflow of priority_encoder is
begin
    process(input)
    begin
        case input is
            when "00000000" =>
                output <= "000";
                valid <= '0';
            when others =>
                output <= "111";  -- Default output for higher priority
                valid <= '1';
                if input(7) = '1' then output <= "111";
                elsif input(6) = '1' then output <= "110";
                elsif input(5) = '1' then output <= "101";
                elsif input(4) = '1' then output <= "100";
                elsif input(3) = '1' then output <= "011";
                elsif input(2) = '1' then output <= "010";
                elsif input(1) = '1' then output <= "001";
                elsif input(0) = '1' then output <= "000";
                end if;
        end case;
    end process;
end dataflow;

This code checks the input vector and determines the highest active bit, setting the output accordingly.